PCI Express 7.0 Specs Released

The PCI-SIG, which oversees the development of the PCIe specification, has officially released the final spec for PCI Express 7.0. "The PCIe 7.0 specification increases the per-lane data transfer rate to 128 GT/s in each direction, which is twice as fast as PCIe 6.0 supports and four times faster than PCIe 5.0," reports Tom's Hardware. "Such a significant performance increase enables devices with 16 PCIe 7.0 lanes to transfer up to 256 GB/s in each direction, not accounting for protocol overhead. The new version of the interface continues to use PAM4 signaling while maintaining the 1b/1b FLIT encoding method first introduced in PCIe 6.0." From the report: To achieve PCIe 7.0's 128 GT/s record data transfer rate, developers of PCIe 7.0 had to increase the physical signaling rate to 32 GHz or beyond. Keep in mind that both PCIe 5.0 and 6.0 use a physical signaling rate of 16 GHz to enable 32 GT/s using NRZ signaling and 64 GT/s using PAM4 signaling (which allows transfers of two bits per symbol). With PCIe 7.0, developers had to boost the physical frequency for the first time since 2017, which required tremendous work at various levels, as maintaining signal integrity at 32 GHz over long distances using copper wires is extremely challenging. Beyond raw throughput, the update also offers improved power efficiency and stronger support for longer or more complex electrical channels, particularly when using a cabling solution, to cater to the needs of next-generation data center-grade bandwidth-hungry applications, such as 800G Ethernet, Ultra Ethernet, and quantum computing, among others. [...] With the PCIe 7.0 standard officially released, members of the PCI-SIG, including AMD, Intel, and Nvidia, can begin finalizing the development of their platforms that support the PCIe specifications. PCI-SIG plans to start preliminary compliance tests in 2027, with official interoperability tests scheduled for 2028. Therefore, expect actual PCIe 7.0 devices and platforms on the market sometime in 2028 - 2029, if everything goes as planned. PCI-SIG also announced that pathfinding for PCIe 8.0 is underway, and members of the organization are actively exploring possibilities and defining capabilities of a standard that they are going to use in 2030 and beyond. "Interestingly, when asked whether PCIe 8.0 would double data transfer rate to 256 GT/s in each direction (and therefore enable bandwidth of 1 TB/s in both directions using 16 lanes), Al Yanes, president of PCI-SIG, said that while this is an intention, he would not like to make any definitive claims," reports Tom's Hardware. "Additionally, he stated that PCI-SIG is looking forward to enabling PCIe 8.0, which will offer higher performance over copper wires in addition to optical interconnects." Read more of this story at Slashdot.

Jun 12, 2025 - 23:50

The PCI-SIG, which oversees the development of the PCIe specification, has officially released the final spec for PCI Express 7.0. "The PCIe 7.0 specification increases the per-lane data transfer rate to 128 GT/s in each direction, which is twice as fast as PCIe 6.0 supports and four times faster than PCIe 5.0," reports Tom's Hardware. "Such a significant performance increase enables devices with 16 PCIe 7.0 lanes to transfer up to 256 GB/s in each direction, not accounting for protocol overhead. The new version of the interface continues to use PAM4 signaling while maintaining the 1b/1b FLIT encoding method first introduced in PCIe 6.0." From the report: To achieve PCIe 7.0's 128 GT/s record data transfer rate, developers of PCIe 7.0 had to increase the physical signaling rate to 32 GHz or beyond. Keep in mind that both PCIe 5.0 and 6.0 use a physical signaling rate of 16 GHz to enable 32 GT/s using NRZ signaling and 64 GT/s using PAM4 signaling (which allows transfers of two bits per symbol). With PCIe 7.0, developers had to boost the physical frequency for the first time since 2017, which required tremendous work at various levels, as maintaining signal integrity at 32 GHz over long distances using copper wires is extremely challenging. Beyond raw throughput, the update also offers improved power efficiency and stronger support for longer or more complex electrical channels, particularly when using a cabling solution, to cater to the needs of next-generation data center-grade bandwidth-hungry applications, such as 800G Ethernet, Ultra Ethernet, and quantum computing, among others. [...] With the PCIe 7.0 standard officially released, members of the PCI-SIG, including AMD, Intel, and Nvidia, can begin finalizing the development of their platforms that support the PCIe specifications. PCI-SIG plans to start preliminary compliance tests in 2027, with official interoperability tests scheduled for 2028. Therefore, expect actual PCIe 7.0 devices and platforms on the market sometime in 2028 - 2029, if everything goes as planned. PCI-SIG also announced that pathfinding for PCIe 8.0 is underway, and members of the organization are actively exploring possibilities and defining capabilities of a standard that they are going to use in 2030 and beyond. "Interestingly, when asked whether PCIe 8.0 would double data transfer rate to 256 GT/s in each direction (and therefore enable bandwidth of 1 TB/s in both directions using 16 lanes), Al Yanes, president of PCI-SIG, said that while this is an intention, he would not like to make any definitive claims," reports Tom's Hardware. "Additionally, he stated that PCI-SIG is looking forward to enabling PCIe 8.0, which will offer higher performance over copper wires in addition to optical interconnects."